Instructions
x86 is home to a few hundred instructions with over 3,000 different encodings. An up-to-date list is available in PDF form on Intel's website (see volume 2).
Opcode maps are available as well.
List
This section is a work in progress. It is incomplete, and may not be completely accurate or up to date.
This list is updated manually, and, as such, may not be current. It is currently being created to follow version 074 of the Intel SDM. In addition to the documented instructions in the software developer manual (SDM), undocumented and AMD-exclusive instructions (such as the XOP set) are included here.
A
AAA- ASCII AdjustALAfter AdditionAAD- ASCII AdjustAXBefore DivisionAAM- ASCII AdjustAXAfter MultiplicationAAS- ASCII AdjustALAfter SubtractionADC- Add With CarryADCX- Unsigned Integer Addition of Two Operands with Carry FlagADD- AddADDPD,ADDPS,ADDSD,ADDSS- Add (Vector)ADDSUBPD,ADDSUBPS- Add/Subtract (Vector)ADOX- Unsigned Integer Addition of Two Operands with Overflow FlagAESDEC,AESDECLAST- Perform AES DecryptionAESDEC128KL- Perform Ten Rounds of AES Decryption With Key LockerAESENC,AESENCLAST- Perform AES EncryptionAESIMC- Perform the AES "Inverse Mix Columns" TransformationAESKEYGENASSIST- AES Round Key Generation AssistAND- Logical ANDANDPD,ANDPS- Logical AND (Vector)ANDN- Logical AND NOTANDNPD,ANDNPS- Logical AND NOT (Vector)ARPL- AdjustRPLField of Segment Selector
B
BEXTR- Bit Extract FieldBLENDPD,BLENDPS- Blend (Vector)BLENDVPD,BLENDVPS- Variable Blend (Vector)BLSI- Extract Lowest Set BitBLSMSK- Get Mask Up to Lowest Set BitBLSR- Clear Lowest Set BitBNDCL- Check Lower BoundBNDCN,BNDCU- Check Upper BoundBNDLDX- Load Extended Bounds Using Address TranslationBNDMK- Make BoundsBNDMOV- Move BoundsBNDSTX- Store Extended Bounds Using Address TranslationBOUND- Check Array Index Against BoundsBSF- Bit Scan ForwardBSR- Bit Scan ReverseBSWAP- Byte SwapBT- Bit TestBTC- Bit Test and ComplementBTR- Bit Test and ResetBTS- Bit Test and SetBZHI- Zero High Bits From Index